Critical Dimension Scanning Electron Microscope (CD-SEM or CDSEM) is a traditional solution for inline fabrication process control of semiconductor wafers. The CDSEM measurements are extracted from top-down images based on secondary electron collection while scanning the specimen.
Modern CD-SEMs are known to deliver accurate measurement results of patterned wafer surfaces (post Litho, post Etch, post Polish) with high precision (typ.0.1 . . . 0.7 nm) at the highest possible SEM resolution (typ. 1.4 nm) by use of very low voltage and probe currents (typ.300V . . . 2 kV 15 . . . 50 pA) with very high throughput (time for move-acquire-measure or MAM time typ. 4 s).
Measurements taken by CD-SEM today, are based on analysis of acquired grey level images as generated by secondary electrons (SE) edge contrast mechanism. SE are characterized by their low energy <50 eV.
Secondary electrons hold majority of the detection yield. These images provide more on the topographical information of the specimen surface and less in terms of material contrast.
In some cases there is too much structural information in the image which can irritate the measurement, in other cases small but important differences between various material compounds cannot be detected, as images are limited by contrast information and resolution of primary scanning beam.
More specifically, at 28 nm technology and below, limits arise for precise metrology and especially for post etch measurements, due to introduction of new material compounds stacks and processes with variable and complex texture as well as reduced feature sizes corresponding to so-called HAR (High Aspect Ratio) structures.
At more advanced technologies beyond 28 nm, due to HAR and 3D complex structures, the bottom signal of SE is close to zero. For example, the multi-stack layer or grains which become visible in open copper area on the via bottom, as well as large process variations can irritate the measurement algorithm and lead to wrong measurement results. Edge-based measurements become insufficient for process control, where measurements based on a bottom signal are needed, since the bottom signal carries information on material and/or non-topographic properties of deep layers.
For example, Back End Of Line (BEOL) metrology, at a final measurement step post etch for the “Trench First Via Last” (TFVL) integration, had been confronted with significant reduction in the yield of SEs coming from the bottom surface edges of vias (i.e., deep channels in a wafer layer/s). At this TFVL integration, first a metal hard mask is patterned for trench forming, and after that a via is etched within the trench down to the underlying copper line. When scanning by a primary beam across the measurement structure, the hard mask is charged up positively (so more electrons escape than are injected by the primary incident beam. This positive charge attracts most of the SE escaping from the bottom of the via. Hence, the number of electrons which arrive at a detector is reduced.
In practice of the SE imaging, for more accurate inspection of wafers and for control of the process, either visual analysis by human operators or/and destructive material analysis is required.
There is an alternative technique, known as Back Scattered Electron (BSE) Imaging, for example a Low Loss BSE (LL-BSE) imaging.
The key at BSE imaging is the collection of only the back scattered electrons (BSE) from outermost specimen surface, which undergo the least amount possible of energy loss in the process of image generation following the impact of the material by a primary beam. In BSE, very good and measurable material distinction and sensitivity can be achieved even for very low density material compounds.
In order to proceed with the description, some comprehensive definitions have been introduced below, which are important for understanding the problem and the exemplary solutions which will be described below.
SEM—Scanning Electron Microscope used for exposing a semiconductor wafer to a primary electron beam, collecting data on responsive electron beams or scattering electrons from one or more layers of the wafer and further reconstructing the obtained SEM image by applying signal processing to the collected data.
CD-SEM (CDSEM)—Critical Dimensions Scanning Electron Microscope, which is applicable in a wide range of nodes having dimensions from about 3000 nm to about 5 nm. CD-SEM delivers High Resolution, High Throughput, and High Repeatability by utilizing improved electron optics and advanced image processing.
CAD data—design data obtained from a CAD-image created by utilizing CAD (computer-aided design) tools for designing features of a specific layer of a wafer.
DR-SEM (Defect Review SEM)—SEM intended for localization of defects on semiconductor wafers, uses an approach of comparing images and does not include performing measurements with high resolution.
Grey Scale Image/Grey Level Image—a digital image/images in the range [0-(28N−1)] of an object to be analyzed, obtained by SEM or CD-SEM. The Grey level image may be obtained using technologies of SE or BSE.
Semiconductor wafer—a semiconductor structure having at least one layer formed by a plurality of features deposited onto the structure.
Via In Trench technology (VIT), Dynamic Random-Access Memory technology (DRAM), Vertical NAND [Negative-AND gate] logic gate technology (VNAND)—modern technologies characterized by a so-called HAR (High Aspect Ratio), which expresses quite high ratio of height/width for a feature to be measured. These technologies are therefore characterized by complex relief of the features created by them and by difficulties of controlling shape of the features by presently known techniques such as SE.
Presently, when technologies up to 8 nm have already emerged and more advanced technologies are being developed, there is a need for a cost-effective, precise, high throughput, non-destructive, high resolution technique of controlling fabrication of semiconductor wafers.